24–2
Chapter 24: Boards Library
Board Configuration
Table 24–1 lists the blocks available to support the Cyclone III EP3C25 starter board.
Table 24–1. Cyclone III EP3C25 Starter Board Blocks
Block
LED1–LED4
SW1–SW4,
USER_RESETN
Description
Controls four user-definable LEDs.
Controls four user-definable push-button switches and the user reset push button.
You can optionally specify the clock signal.
f For information about setting up the board, refer to the Cyclone III FPGA Starter Kit
User Guide . For information about supported hardware features, refer to the Cyclone III
FPGA Starter Board Reference Manual .
Figure 24–1 shows the design example for the Cyclone III EP3C25 starter board.
Figure 24–1. Design Example for the Cyclone III EP3C25 Starter Board
Cyclone III EP3C120 DSP Board
The Cyclone III EP3C120 DSP board provides a hardware platform for developing
and prototyping low-power, high-volume, feature-rich designs that demonstrate the
Cyclone III device’s on-chip memory, embedded multipliers, and the Nios ? II
embedded soft processor.
Table 24–2 lists the blocks available to support the Cyclone III EP3C120 DSP board.
Table 24–2. Cyclone III EP3C120 DSP Board Blocks
Block
Display0
A2D_1_HSMC_A,
A2D_1_HSMC_B,
A2D_2_HSMC_A,
A2D_2_HSMC_B
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
Description
User defined 4-digit seven-segment LED display (U30).
Controls 14-bit signed analog-to-digital converters on the optional high speed
mezzanine cards (HSMC). You can optionally specify the clock signal.
November 2013 Altera Corporation
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